SEMICONDUCTOR INTEGRATED CIRCUIT DEVICE AND DELAY-LOCKED LOOP DEVICE

摘要

PURPOSE: To provide a delay-locked loop (DLL) circuit and a semiconductor integrated circuit for reducing power consumption. CONSTITUTION: This device is provided with a DLL circuit 2 equipped with delay circuits 21 and 22 for inputting and delaying a frequency dividing clock CLK2 outputted from a frequency dividing circuit 6, a phase detector 23 and a counter 24 and a DLL circuit 3 equipped with delay circuits 31 and 32 for inputting and delaying the frequency dividing clock CLK2, phase detector 33, with which a phase difference between the output CLK1 of an input buffer and the output of a buffer 38 is detected, provided with multiplexer 35A, dummy multiplexer 36, dummy buffer 37 and dummy buffer 38 for inputting output OUTR and OUTF of the delay circuits 31 and 32 and outputting a signal CLKOE, with which rising and falling are specified with rising of OUTR and OUTF and rising and falling are specified with falling of OUTR and OUTF, and counter 34 for outputting a signal for switching the output tap of the delay circuits 31 and 32 corresponding to the output of the phase detector 33.