发明名称 WATCHDOG ARRANGEMENT
摘要 A watchdog arrangement advantageously provides systems, such as television signal processing apparatus, with a reliable, cost effective means by which to maintain consistent, stable operation. According to at least one embodiment, a hardware watchdog circuit receives regular pulses from a software timer in an integrated circuit (IC) to refresh itself. In the event that the watchdog circuit is not refreshed, it provides a predetermined logic signal to a non-maskable interrupt (NMI) terminal of the IC to generate a reset similar to what is generated by an internal IC watchdog.
申请公布号 WO0195110(A3) 申请公布日期 2003.03.27
申请号 WO2001US16750 申请日期 2001.05.24
申请人 THOMSON LICENSING S.A.;FORLER, JOSEPH, WAYNE;NIERZWICK, MARK, ALAN;TESTIN, WILLIAM, JOHN 发明人 FORLER, JOSEPH, WAYNE;NIERZWICK, MARK, ALAN;TESTIN, WILLIAM, JOHN
分类号 G06F11/30;G06F11/00;H04N5/14;H04N17/04 主分类号 G06F11/30
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