发明名称 Semiconductor memory device
摘要 A refresh address is set to a definite state prior to the rise of a clock signal, a refresh instruction is taken-in in synchronization with a clock signal and a refresh operation is performed according to the refresh instruction. Further, in a refresh operation, refresh is performed with a sub-word line being a unit; thereby enabling high speed refresh of memory sell data with a reduced current consumption.
申请公布号 US6538953(B2) 申请公布日期 2003.03.25
申请号 US20020103999 申请日期 2002.03.25
申请人 MITSUBISHI DENKI KABUSHIKI KAISHA 发明人 HIDAKA HIDETO
分类号 G11C11/403;G11C11/401;G11C11/406;G11C11/407;G11C29/04;(IPC1-7):G11C8/00 主分类号 G11C11/403
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