| 摘要 |
<p>PROBLEM TO BE SOLVED: To effectively realize a decoding operation by reducing the operation delay of a lookup table. SOLUTION: This device is provided with; first and second latch circuits 103 and 105 for storing a segment with fixed word length from a buffer 101; a bit shifting circuit 107 which supplies an M bit window output sequence of a segment with a fixed word length; a bit generating circuit 109 which generates an N bit output sequence; a latch 113 which generates a decoded output sequence of a segment with a fixed word length; an OR circuit 111; and a shifter 115. Also, this device includes; a memory device 121 having plural lookup tables which generate a constant variable length code word and code word length; a VLC control block 119 which generates an output selection signal and a clock signal; an output selecting block 117 which selectively generates an inputted variable length code word and code word length; and a carry signal generator 123 which generates a position control signal and a reading signal.</p> |
