发明名称 SEMICONDUCTOR MEMORY AND ITS TESTING METHOD
摘要 PROBLEM TO BE SOLVED: To provide a semiconductor memory which has small chip size and small power consumption, is inexpensive, and causes neither delay of access nor memory destruction due to skew included in an address as a semiconductor memory which is equipped with the same memory cells as those of a DRAM and operates with SRAM specification. SOLUTION: An ATD circuit 3 generates a one-shot pulse in an address change detection signal ATD in response to change of an address Address supplied from outside. At this time, one-shot pulses are generated by the bits of the address and put together to generate only one one-shot pulse even when the address includes the skew. Refreshing operation is performed first during the generation period of the one-shot pulse by using a refresh address R- ADD generated by a refresh control circuit 4. Then a latch control signal LC is generated in response to the fall of the one-shot pulse and the address is supplied to a latch 2 to access a memory cell array 6.
申请公布号 JP2003085970(A) 申请公布日期 2003.03.20
申请号 JP20020253650 申请日期 2002.08.30
申请人 NEC CORP 发明人 TAKAHASHI HIROYUKI;INABA HIDEO;KUSAKARI TAKASHI
分类号 G11C11/403;G11C11/406;(IPC1-7):G11C11/403 主分类号 G11C11/403
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