发明名称 METHOD FOR AUTOMATICALLY ARRANGING LOGICAL ELEMENT OF ELECTRONIC CIRCUIT DEVICE
摘要 PROBLEM TO BE SOLVED: To provide a method for automatically arranging a logical element capable of considering any influence on an operation delay time and a voltage margin due to temperature distribution. SOLUTION: An electronic circuit device is divided into at least one small region, and a power to be consumed in each small region is calculated, and the temperature of each small region is calculated by using a cooling characteristic matrix to be decided by a cooling structure from the calculated power, and an operation delay time and a voltage margin are calculated from the calculated temperature, and whether or not they are within a target range is decided.
申请公布号 JP2003085227(A) 申请公布日期 2003.03.20
申请号 JP20010274422 申请日期 2001.09.11
申请人 HITACHI LTD 发明人 ICHIKAWA SUMIMASA;HIYAMA TORU;ISOMURA SATORU
分类号 G06F17/50;H01L21/82;H01L21/822;H01L27/04;(IPC1-7):G06F17/50 主分类号 G06F17/50
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