| 摘要 |
PURPOSE: A complementary MOS semiconductor device enables low voltage operation at low manufacturing cost and in a short manufacturing period, to achieve low power consumption and high driving ability and to realize a power management semiconductor device or an analog semiconductor device at high speed operation. CONSTITUTION: The structure of the CMOS semiconductor device includes, on an SOI substrate constituted by a p-type semiconductor substrate(101), a buried insulating film(133), and a p-type semiconductor thin film layer(134) for forming an element: a CMOS constituted by an NMOS(113), in which a gate electrode is formed in the p-type semiconductor thin film layer(134) and is comprised of p+ polycrystalline silicon(107) and in which a source and a drain take a so-called single drain structure, and a PMOS(112), in which a gate electrode is formed in an n-well region(102) and is also comprised of the p+ polycrystalline silicon(107) and which takes a single drain structure; and a p- resistor(114) and an n- resistor(115) which are formed on a field insulating film(106) and each of which is comprised of polycrystalline silicon and is used for a voltage dividing circuit for dividing a voltage, a CR circuit for setting a time constant, or the like.
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