发明名称 |
MEMORY USING ERROR-CORRECTING CODES TO CORRECT STORED DATA IN BACKGROUND |
摘要 |
A memory (60) that corrects storage errors during those periods in which the memory is not servicing read/write instructions from an external system. The memory (60) reads and writes data words that are stored in a storage block (61) that includes a plurality of storage words. Each storage word stores a data entry specifying one of the data words. The data entry is encoded with error-correcting information sufficient to correct a one-bit error in the data word. The storage words are connected to the error-correcting circuit (64) during idle periods or during the conventional refresh operations in the case of DRAM-like memories. The controller (65) also causes each corrected storage word to be re-written to the storage block (61) in place of the storage word from which the corrected storage word was generated if an error is detected by the error-correcting circuitry .
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申请公布号 |
WO03021599(A1) |
申请公布日期 |
2003.03.13 |
申请号 |
WO2002US27615 |
申请日期 |
2002.08.30 |
申请人 |
TACHYON SEMICONDUCTEUR CORPORATION |
发明人 |
HILBERT, MARK, F. |
分类号 |
G06F11/10;G11C7/24;G11C11/406;G11C29/42;(IPC1-7):G11C7/00;G11C29/00 |
主分类号 |
G06F11/10 |
代理机构 |
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代理人 |
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主权项 |
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地址 |
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