发明名称 |
Burst error and additional random bit error correction in a memory |
摘要 |
A system for memory word error correction that enables correction of burst errors in memory words. The system is based on an adaptation of two-error correction BCH code which yields burst error correction without increasing the number of error correction bits in the memory words over prior two-error BCH code error correction schemes. The adaptation of two-error correction BCH code when combined with additional techniques for detecting columns of burst errors enables the correction of burst errors and additional random bit errors in memory words.
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申请公布号 |
US6532565(B1) |
申请公布日期 |
2003.03.11 |
申请号 |
US19990440323 |
申请日期 |
1999.11.15 |
申请人 |
HEWLETT-PACKARD COMPANY |
发明人 |
ROTH RON M.;SEROUSSI GADIEL;BLAKE IAN F. |
分类号 |
H03M13/15;H03M13/17;(IPC1-7):H03M13/00;H03M13/03 |
主分类号 |
H03M13/15 |
代理机构 |
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代理人 |
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主权项 |
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地址 |
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