发明名称 SEMICONDUCTOR INTEGRATED CIRCUIT DEVICE
摘要 PROBLEM TO BE SOLVED: To provide a technique to reduce an occupied area of a sense amplifier forming region in a semiconductor chip including a DRAM. SOLUTION: A gate electrode FGST1 of n-channel type MISFET, a gate electrode FGST2 of n-channel type MISFET, a gate electrode FGST3 and p- channel type MISFET and a gate electrode FGST4 of p-channel type MISFET are formed in shapes of rectangular frames on the active region L. A side of square or rectangular shape is allocated in the condition inclined at about 45 deg. for the extending direction of the bit line.
申请公布号 JP2003068880(A) 申请公布日期 2003.03.07
申请号 JP20010258999 申请日期 2001.08.29
申请人 HITACHI LTD;NEC CORP 发明人 ARAI KOJI;MIYATAKE SHINICHI
分类号 H01L21/8242;H01L27/108 主分类号 H01L21/8242
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