| 摘要 |
Faulty memory (1) cells are detected in a memory test. Addresses of faulty memory cells are stored in a register with multiple writing facility of a redundance circuit (2), so arranged that it deflects access to memory cell in the register to auxiliary memory cell. Pref. the memory test and registering of addresses of faulty memory cells is carried out in the operational environment of the circuit, and at each switching-on of the circuit and at given time points. Independent claims are included for a circuit with the above memory, and for the redundance circuit.
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