| 摘要 |
A data recovery circuit and method for minimizing errors due to clock skew at a lower power are provided. The data recovery circuit includes a phase-locked loop, an oversampling unit, a pattern detector, a state selector, and a data selector. The data recovery circuit has a phase-locked loop for generating a plurality of clock signals, each of which is synchronized to an input clock signal and has a different delay time; an oversampling unit for non-integer times oversampling serial data which is input from the outside, in response to the plurality of clock signals, and outputting the oversampled result as sample data formed of a plurality of bits; a pattern detector for receiving the sample data formed of the plurality of bits, and generating a pattern signal formed of a plurality of bits by detecting level transitions between bits of the sample data; a state accumulator for receiving the pattern signal formed of the plurality of bits, accumulating the frequency of occurrence of the pattern signal, and outputting the pattern signal having the highest frequency of occurrence as a state signal formed of a plurality of bits; a state selector for receiving the state signal formed of the plurality of bits, and generating a state selection signal formed of a plurality of bits for selecting bits at predetermined positions in the sample data; and a data selector for receiving the sample data, selecting bits of the sample data in response to the state selection signal, where the bits correspond to the state selection signal, and outputting the selected bits as recovered data formed of a plurality of bits. The oversampling unit has a plurality of sampling means, each for receiving the serial data, sampling the serial data in response to each of the plurality of clock signals, and then outputting one bit of the sample data. The oversampling unit 2.7 times oversamples each one bit section of the input serial data. According to the data recovery circuit and method, the clock frequency of a phase-locked loop for recovering data having the same frequency is set at a lower level, and therefore power consumption is minimized.
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