发明名称 |
METHOD FOR FABRICATING NON-VOLATILE MEMORY DEVICE INCLUDING SELF-ALIGNED GATE STRUCTURE AND NON-VOLATILE MEMORY DEVICE THEREBY |
摘要 |
PURPOSE: A method for fabricating a non-volatile memory device including a self-aligned gate structure and a non-volatile memory device thereby are provided to prevent an error due to a contact hole by reducing height of an interlayer dielectric. CONSTITUTION: A tunnel dielectric layer(210) is formed on a semiconductor substrate(100). The first floating gate pattern is formed on the tunnel dielectric layer(210). A mold pattern is formed on the first floating gate pattern. A floating gate(300') is formed by removing the first floating gate pattern. An interlayer dielectric layer pattern(500) is formed by filling up a gap between the mold patterns. The mold pattern is removed by using the interlayer dielectric layer pattern(500) as an etch mask. An intergate dielectric layer(250) is formed on the exposed floating gate(300') between the interlayer dielectric layer patterns(500). A control gate(600) is formed by filling up a gap between the interlayer dielectric layer patterns(500) on the intergate dielectric layer(250).
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申请公布号 |
KR20030014499(A) |
申请公布日期 |
2003.02.19 |
申请号 |
KR20010048526 |
申请日期 |
2001.08.11 |
申请人 |
SAMSUNG ELECTRONICS CO., LTD. |
发明人 |
HWANG, JAE SEONG;LEE, SEUNG MIN;SEO, GANG IL |
分类号 |
H01L21/28;H01L21/8247;H01L27/115;H01L29/788;H01L29/792;(IPC1-7):H01L27/115;H01L21/824 |
主分类号 |
H01L21/28 |
代理机构 |
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代理人 |
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主权项 |
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地址 |
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