| 摘要 |
A semiconductor memory device includes a reference voltage circuit which has an external power supply voltage input thereto and outputs a reference voltage. A standard voltage circuit has the reference voltage input thereto, and outputs a standard voltage. A voltage detecting circuit includes a PMOS transistor having a gate connected to the standard voltage, a source connected to a test mode signal pad, and a drain connected to the ground voltage via a resistor. A test mode control circuit outputs a test mode operation signal, an input terminal of the test mode control circuit being connected to a node of the voltage detecting circuit that is between the PMOS transistor and the resistor.
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