发明名称 |
CIRCUITS AND METHODS FOR OUTPUT IMPEDANCE MATCHING IN SWITCHED MODE CIRCUITS |
摘要 |
An output stage 300 includes a first output switch 201 having a current path for driving an output from a first voltage rail and a second output switch 202 having a current path for selectively driving the output from a second voltage rail. A first reference switch 301 is scaled with respects to first output switch 201 and has a current path coupled to the first voltage rail. A second reference switch 302 scaled with respect to second output switch 202 has a current path coupled to a current path of first reference switch 301 at a node and the second voltage rail. The logic measures an impedance mismatch between first and second reference switches 301, 302 and proportionally varies the impedance of a selected one of first and second output switches 201, 202 in response.
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申请公布号 |
WO03012997(A1) |
申请公布日期 |
2003.02.13 |
申请号 |
WO2002US17826 |
申请日期 |
2002.06.05 |
申请人 |
CIRRUS LOGIC, INC. |
发明人 |
MELANSON, JOHN, LAURENCE;WALBURGER, ERIC;GABORIAU, JOHANN, GUY |
分类号 |
H03F3/217;H03H11/28;H03K17/14;H03K17/695;(IPC1-7):H03K17/14 |
主分类号 |
H03F3/217 |
代理机构 |
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代理人 |
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主权项 |
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地址 |
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