| 摘要 |
To provide a semiconductor memory device in which no separation of a silicide layer formed on a control gate takes place and a process for manufacturing the same. A gate dielectric layer and floating gate (4 in <cross-reference target="DRAWINGS">FIG. 4</cross-reference>) are formed on a silicon substrate. A sidewall made of polysilicon (7 in <cross-reference target="DRAWINGS">FIG. 4</cross-reference>) is disposed on the lateral side of the floating gate in such a manner that a stop oxide layer (6a in <cross-reference target="DRAWINGS">FIG. 4</cross-reference>) which functions as an etching stop for the polysilicon is sandwiched between the floating gate and the sidewall. A control gate (8 in <cross-reference target="DRAWINGS">FIG. 4</cross-reference>) is laminated on the upper side of the floating gate having a step which is sloped by the sidewall in such a manner that an ONO layer (5 in <cross-reference target="DRAWINGS">FIG. 4</cross-reference>) is sandwiched between the floating gate and the control gate.
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