发明名称 |
Structure of a flash memory |
摘要 |
A structure of a flash memory is provided. The flash memory has a charge trapping layer, a gate and a source/drain region, wherein the charge trapping layer is formed by stacking in sequence a first oxide layer, a dielectric layer of high dielectric constant material and a second oxide layer. The gate is arranged on the charge trapping layer, and the source/drain region is arranged at the two lateral sides of the substrate.
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申请公布号 |
US2003025148(A1) |
申请公布日期 |
2003.02.06 |
申请号 |
US20010990862 |
申请日期 |
2001.11.13 |
申请人 |
HSIEH JUNG-YU;LIN CHIN-HSIANG |
发明人 |
HSIEH JUNG-YU;LIN CHIN-HSIANG |
分类号 |
H01L29/51;H01L29/792;(IPC1-7):H01L29/788 |
主分类号 |
H01L29/51 |
代理机构 |
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代理人 |
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主权项 |
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地址 |
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