发明名称 METHOD AND DEVICE FOR FACILITY PROCESSING TIME COMPUTATION, AND RECORDING MEDIUM WITH RECORDED FACILITY PROCESSING TIME COMPUTING PROGRAM
摘要 <p>PURPOSE: To precisely predict the lot processing time of a processor capable of processing a plurality of lots at the same time. CONSTITUTION: A scheduler 1 sends information on a lot as an object of processing time computation to a processing time computation part 201 of a facility processing time computing device 2. The computation part 201 takes a frequency upper-limit value (simultaneous operation lot number upper-limit value) X for processing facilities which perform processing out of a setting information holding part 202 and inquires of the scheduler 1 about an operation history back to the past operation done by the facilities X times before to obtain an answer. The computation part 201 obtains a numeral S indicating the shortest processing time of the object lot of processing time computation from an S numeral holding part 204 and a numeral R indicating the minimum end time difference of the object lot of processing time computation from an R numeral holding part 203. The computation part 201 computes the processing time by using the information received from the scheduler 1, the information received from the setting information holding part 202, the information received from the S number holding part 204, and the information received from the R numeral holding part 203.</p>
申请公布号 KR20030010529(A) 申请公布日期 2003.02.05
申请号 KR20020043835 申请日期 2002.07.25
申请人 NEC ELECTRONICS CORPORATION 发明人 KAWAMURA NAOKI
分类号 G01R31/26;G05B19/418;G06F7/00;G06F19/00;G06Q50/00;G06Q50/04;H01L21/00;(IPC1-7):G06F19/00 主分类号 G01R31/26
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