Semiconductor integrated circuit for low power and high speed operation

摘要

A semiconductor integrated circuit includes: a first p-channel FET having a gate controlled by a first input and having a source-drain path connected between a first operating potential point and a first node; a first n-channel FET having a gate controlled by a second input and having a source-drain path connected between the first node and a second node; a second n-channel FET having a gate controlled by the first node and having a source-drain path connected between the second node and a second operating potential point; a third n-channel FET having a gate controlled by the first node and having a source-drain path connected between the second node and a third operating potential point; a second p-channel FET having a gate controlled by the first input and having a source-drain path connected between a third node and a fourth node; a third p-channel FET having a gate controlled by the fourth node and having a source-drain path connected between the first operating potential point and the third node; a fourth p-channel FET having a gate controlled by the fourth node and having a source-drain path connected between a fourth operating potential point and the third node; and a fourth n-channel FET having a gate controlled by the second input and having a source-drain path connected between the fourth node and the second operating potential point.