| 摘要 |
In a data processing system, a circuit and methods for carrying out sequential logic functions are disclosed aimed at overcoming the problems encountered with the standard approach for designing synchronous logic, timed from a single clock source. When propagation delays through logic elements and their interconnections are becoming of the same order of magnitude as the clock period necessary to achieve the required level of performance of a logic function, the distribution of a common timing reference or clock over an entire function is becoming the limiting factor. In a complete departure from the standard approach, logic functions of the invention are capable of supplying their own timing information to their interface thus, self asserting their result and capable of requesting new set of inputs when needed. Therefore, logic functions of the invention are autonomous and do not rely on the distribution of a clock to operate.
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