发明名称 DEMULTIPLEXING CIRCUIT
摘要 PROBLEM TO BE SOLVED: To provide a demultiplexing circuit that can demultiplex a plurality of input data at the same time while minimizing the scale of circuit. SOLUTION: The demultiplexing circuit is provided with an input line identification information providing circuit 2 that provides input line identification information to input data received from a plurality of input lines 1 and having data identification information, a multiplexer 4 that outputs input data to which the input line identification information providing circuit 2 provides the input line identification information into a common line 5, a filter 6 that applies filtering to the input line identification information and the data identification information of data outputted from the multiplexer all at once, and a filter table 7 that stores filter conditions used for the filter 6.
申请公布号 JP2003032563(A) 申请公布日期 2003.01.31
申请号 JP20010217500 申请日期 2001.07.18
申请人 MATSUSHITA ELECTRIC IND CO LTD 发明人 SATO TOMOYA;TANAKA KAZUHISA;MIZOBATA KYOHIKO
分类号 H04J3/00;H04N5/44;H04N7/08;H04N7/081;H04N7/173;H04N21/426;H04N21/434;H04N21/83 主分类号 H04J3/00
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