| 摘要 |
PROBLEM TO BE SOLVED: To improve the ESD resistance of a semiconductor device of a multiple power source system. SOLUTION: The semiconductor device comprises an outer periphery ESD protective circuit 11 formed at each pad 9 of a semiconductor chip 1 at an outer peripheral side from the pad 9 of the chip 1. The protective circuit 11 has N-type diffused regions 15, 17 and 19 isolated by an element isolating oxide film 13. The region 17 is electrically connected to the pad 9, the region 15 is electrically connected to a digital power source DVcc, and the region 19 is electrically connected to a digital ground DGND. The power source DVcc and the ground DGND are highest potential of a plurality of types of the power sources used at the chip. Electrostatic noise from the pad 9 is propagated to the region 17 and gate electrodes 27, 31, and drawn to the power source DVcc or the ground DGND through the region 17, a channel (arrow A or B) and the region 15 or 19. |
