| 摘要 |
PROBLEM TO BE SOLVED: To provide a microprocessor capable of setting the number of the waits of operation time to a part of an instruction code. SOLUTION: The number of the waits corresponding to instruction performance required time is freely settable to the specified bit of the instruction code. The setting of the wait can be stopped by changing a specified bit value in a low-speed clock operation to the instruction to which the wait is set in a high-speed clock operation and the wait can be set to the instruction for which the need of wait setting is recognized after a product is made. Respective circuits perform the instruction by a control signal outputted by an instruction decoder 5 by decoding the instruction code stored in an instruction register 4. By a wait signal outputted by a wait counter 7 by the wait number setting of the specified bit of the instruction code, the instruction register 4 holds the storage of the next instruction code and a program counter 9 stops the output of the next address signal. The respective circuits inside the microprocessor 1A secure the required processing time corresponding to the number of the waits and the highly accurate and correct performance of the present instruction is possible.
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