发明名称 |
TEST PATTERN GENERATION CIRCUIT AND GENERATION METHOD FOR BUILT IN SELF TEST CIRCUIT |
摘要 |
PROBLEM TO BE SOLVED: To provide a pattern generation circuit of a BIST(build in self test) circuit capable of generating a prescribed test pattern in a small area by reducing the number of test pattern generation circuits, and a test pattern generation method for the BIST circuit. SOLUTION: A built in self test circuit generating a test pattern by using a microinstruction code is provided with a storage device RAM/ROM temporarily storing the microinstruction code and outputting two different instruction codes in one clock cycle, a selector SEL receiving the output of the storage device, selectively delaying the two instruction codes and outputting them as one code and a pattern generation circuit PG generating the test pattern corresponding to the output of the selector. |
申请公布号 |
JP2003030000(A) |
申请公布日期 |
2003.01.31 |
申请号 |
JP20010216732 |
申请日期 |
2001.07.17 |
申请人 |
MITSUBISHI ELECTRIC CORP;RYODEN SEMICONDUCTOR SYST ENG CORP |
发明人 |
MATSUO YUKIKAZU;NAGURA YOSHIHIRO |
分类号 |
G01R31/3183;G01R31/28;G01R31/3181;G06F11/22 |
主分类号 |
G01R31/3183 |
代理机构 |
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代理人 |
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主权项 |
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地址 |
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