发明名称 |
Semiconductor device fabricating method |
摘要 |
A method of fabricating a semiconductor device in which a LOCOS profile characteristic is applied to a normal shallow trench isolation (STI) structure thereby lowering compressive stress that is concentrated on the side of the STI and preventing a thinning phenomenon by which the oxide film is formed in a relatively thin thickness at the boundary of the STI and the gate oxide film for high voltage (HV) region. The STI of a CVD oxide material including an angular bird's beak extension structure is formed in a field region, a gate oxide film is formed in a relatively thick thickness in a HV region by using a nitride film as a mask, and a gate oxide film having a relatively thin thickness is formed in a low voltage (LV) region.
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申请公布号 |
US2003022460(A1) |
申请公布日期 |
2003.01.30 |
申请号 |
US20020117882 |
申请日期 |
2002.04.08 |
申请人 |
SAMSUNG ELECTRONICS CO., LTD. |
发明人 |
PARK JOO-HAN |
分类号 |
H01L21/76;H01L21/762;H01L21/8234;H01L21/8238;H01L27/08;H01L27/092;(IPC1-7):H01L21/336 |
主分类号 |
H01L21/76 |
代理机构 |
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代理人 |
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主权项 |
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地址 |
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