发明名称 LOW VOLTAGE THRESHOLD DYNAMIC BIASING
摘要 <p>A low voltage threshold semiconductor circuit comprising a first semiconductor component (6), a second semiconductor component (7), and a well (1), wherein the well (1) is connected between the first (6) and the second (7) component and wherein the first component (6) is connected as a diode between the well (1) and a first voltage (3), and the second component (7) is connected as a diode between the well (1) and a second voltage (5), so that the first component (6) automatically conducts when the first voltage (3) is higher than the second voltage (5) and the second component (7) automatically conducts when the second voltage (5) is higher than the first voltage (3), characterised in that the first (6) and the second (7) semiconductor components comprise Dynamic Threshold Metal Oxide Semiconductor Transistors (DTMOSTs). The well (1) may be connected to an external circuit power supply and is preferably an n-well at its low voltage side and is connected to the cathodes of each DTMOST has its gate connected to its drain and to the well (1) and the source of the first DTMOST is connected to the first voltage (3) and the source of the second is connected to the second voltage. A power switching comprising such a MOS circuit finds application in switching between main and backup supplies in portable telephones, clock chips and GPS receiver chips because it reduces static current consumption by eliminating parasite currents.</p>
申请公布号 WO2003007381(A2) 申请公布日期 2003.01.23
申请号 IB2002002476 申请日期 2002.06.20
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