发明名称 METHOD FOR MANUFACTURING TRENCH-TYPE GATE
摘要 PURPOSE: A method for manufacturing a trench-type gate is provided to be capable of obtaining full depletion SOI(Silicon On Insulator) and optimizing parasitic series resistance. CONSTITUTION: A buried oxide layer(11), a silicon layer(12), a pad oxide(13) and a pad nitride are sequentially stacked on a silicon substrate(10). The first trench is formed by selectively etching the silicon layer(12) using the pad nitride as a mask. An oxide spacer(13') is formed at a channel region of the first trench. After forming a field oxide layer(20) by LOCOS(Local Oxidation of Silicon), a nitride spacer(21) is formed at both sidewalls of the oxide spacer(13'). The second trench is formed by selectively etching the field oxide layer(20) to define a trench-type gate region. A trench-type gate(22) is then formed in the trench-type gate region. After removing the pad nitride, an LDD(Lightly Doped Drain) region and a source/drain region are formed in the silicon layer(12).
申请公布号 KR100371149(B1) 申请公布日期 2003.01.22
申请号 KR20010036764 申请日期 2001.06.26
申请人 HYNIX SEMICONDUCTOR INC. 发明人 JANG, MIN WOO
分类号 H01L21/336;(IPC1-7):H01L21/336 主分类号 H01L21/336
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