| 摘要 |
A redundant circuit of the semiconductor memory device is composed of a fuse block which assigns addresses of defective memory cells by selectively disconnecting fuses of the fuse block, address latches which individually generate and hold fuse information depending on whether the fuses are supplied with currents or not at the time of initialization, a redundant circuit-selecting latch which generates and holds fuse information depending on whether a redundant circuit-selecting fuse is supplied with a current or not and outputs a terminal voltage of the redundant circuit-selecting fuse at the time of initialization, and a N-type MOS transistor which forms returning paths of the currents flowing through the fuses of the fuse block in accordance with the terminal voltage of the redundant circuit-selecting fuse.
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