Semiconductor wafer, semiconductor chip, semiconductor device and method for manufacturing semiconductor device

摘要

There is provided an electrical characteristic test technique for a semiconductor device that can shorten the time required for a next probe test after a wafer level burn-in test, prevent leak of defective product to an assembling process and moreover easily realizes the analysis of cause for generation of a fault after delivery of products to customers. In this electrical characteristic test technique, a multi-chip package MCP mounts a couple of semiconductor chips of flash memory and SRAM, a simultaneous contact check is executed for an input/output pad of each semiconductor chip and an erase/write mode and a read mode are respectively executed for a memory array of each semiconductor chip depending on the steps S201 to S211 on the occasion of conducting the wafer level burn-in of the semiconductor chip of flash memory, historical data of these test results is written into the semiconductor chip of flash memory and the historical data written in the wafer level burn-in process is read in a next probe test process and the probe test is continuously implemented only to the semiconductor chip of a good product.