发明名称 VDD modulated sram for highly scaled, high performance cache
摘要 The present invention provides a device and method for fast SRAM reading and writing. A boost voltage source is provided, wherein the boost voltage source operates to increase a conductance of a latch device in the SRAM cell relative to a conductance of an access device in the SRAM cell. By virtue of the increased relative conductance between the latch and access devices (beta ratio), the access device may be assume a wider width without jeopardizing the read stability of the cell.
申请公布号 US2003012048(A1) 申请公布日期 2003.01.16
申请号 US20010893236 申请日期 2001.06.27
申请人 CHAPPELL BARBARA A.;YOUNG IAN 发明人 CHAPPELL BARBARA A.;YOUNG IAN
分类号 G11C11/412;(IPC1-7):G11C11/00 主分类号 G11C11/412
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