发明名称 Optimized flash memory cell
摘要 A flash memory comprising floating gate devices being connected to one-another through their source electrodes being self-aligned to their respective gate electrodes, a local tungsten interconnect making a substantially continuous connection to the sources. The flash memory is formed by forming floating gate devices, each comprising a floating gate, forming a source electrode for each floating gate device and connecting each source electrode together by a conductive implant into a defined active area, forming a nitride barrier layer overlying each transistor gate, forming a planarized insulation layer over the nitride barrier layer, removing portions of the planarized insulation layer while using the nitride barrier layer to self-align an interconnect via opening to the source electrodes, forming a metal interconnect into the interconnect via, the metal interconnect running a major length of the interconnected source electrodes and making contact therebetween, and forming a metal drain plug for each floating gate device.
申请公布号 US2003013253(A1) 申请公布日期 2003.01.16
申请号 US20010905517 申请日期 2001.07.13
申请人 HURLEY KELLY T. 发明人 HURLEY KELLY T.
分类号 H01L21/8247;H01L27/115;(IPC1-7):H01L21/336 主分类号 H01L21/8247
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