| 摘要 |
PROBLEM TO BE SOLVED: To provide a semiconductor integrated circuit in which a chip area can be reduced by eliminating a ROM exclusively used for a BIST, and whose test can be performed with satisfactory efficiency and at high speed. SOLUTION: In the semiconductor integrated circuit provided with a storage means comprising a plurality of volatile memory cells, the offset of an electrical characteristic is added to an element MN1 and an element NM2 constituting each memory cell in each memory cell, in such a way that, when a power supply is turned on, the storage bit of a prescribed memory cell in the storage means is decided unconditionally, and a state that a test program used to perform the self-test of the integrated circuit by the storage bit unconditionally decided when the power supply is turned on is set. |
