| 摘要 |
PROBLEM TO BE SOLVED: To provide a semiconductor integrated circuit device in which the area for the layout is reduced and the number of man-hours for development and modification of a cell library is decreased. SOLUTION: The arrangement and wiring of a circuit are designed by using a standard cell library having both or either of a single MIS transistor and a series MIS transistor sharing an active diffusion layer area (source or drain) as a primitive cell in combination with a normal inverter circuit, a NAND cell, or the like, an intermediate logic cell formed by combining the primitive cells and composed of the relative or absolute arrangement information and the logic connection information of the primitive cell, and an intermediate logic cell library that is a collection of the intermediate logic cells.
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