| 摘要 |
A power supply and method for a central processing unit (CPU). The power can include a first power supply circuit such as a DC/DC converter for supplying a voltage of a first level to the CPU when the CPU is in a high activity mode, and a second power supply circuit such as an LDO regulator circuit for supplying a voltage of a second level lower than the first level to the CPU when the CPU is in a low activity mode. The second power supply circuit is preferably efficient when the CPU is in a low load or low activity mode. In such a power supply, when the CPU is in the low activity mode, the LDO regulator circuit is operated to reduce or prevent the efficiency from being degraded, reduce a CPU power consumption and extend a CPU battery lifetime.
|
