| 摘要 |
A method and apparatus for processing defect addresses includes a reduced number of defect addresses to the extent necessary for later evaluation of the defect situation. Preferably, defect addresses are not stored when more than a predetermined number of defects are known for a column in the case of column-by-column checking of a matrix-type memory or per row in the case of row-by-row checking of a matrix-type memory.
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