发明名称 CLOCK PHASE SYNCHRONIZATION DEVICE BETWEEN DUAL CLOCK UNITS OF SYNCHRONOUS TRANSMISSION SYSTEM
摘要 PURPOSE: A clock phase synchronization device between dual clock units of a synchronous transmission system is provided to match effectively phases of each system clock by exchanging phase detection data of phase synchronous loops between dual clock units of a transmission system. CONSTITUTION: A master unit is formed with a digital phase detector(320), a comparison decision portion(321), a digital loop filter(322), a DAC(323), and a VCXO(324). A slave unit is formed with a digital phase detector(310), a comparison decision portion(311), a digital loop filter(312), a DAC(313), and a VCXO(314). The master unit and the slave unit receives and transmits phase detection data of the digital phase detectors(310,320) from or to each other in order to match phases of output clocks of the VCXO(314,324) of the master unit or the slave unit.
申请公布号 KR20030000235(A) 申请公布日期 2003.01.06
申请号 KR20010035914 申请日期 2001.06.22
申请人 LG ELECTRONICS INC. 发明人 KIM, HYEONG SUK
分类号 H04L7/033;(IPC1-7):H04L7/033 主分类号 H04L7/033
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