| 摘要 |
PURPOSE: A device for processing data receiving of a MAC(Media Access Control) system is provided to generate a counter check signal and a frame end signal using receiving clocks and receiving data signals inputted from a 1-layer chip of a lower terminal. CONSTITUTION: A frame start detector(4) detects a position of a start boundary using receiving data and receiving clock signals inputted from an ADSL DSP(Asymmetric Digital Subscriber Line Digital Signal Processing) part(3), and outputs a start boundary signal. A frame counter(5) increases a count by the start boundary signal to output a control signal for processing MAC data. A frame decode register(6) separately latches data, destination addresses and data length in MAC frames according to the control signal of the frame counter(5), and outputs latch information signals about outputs of latched register data, register destination addresses and register length. A length reduction counter(7) counts MAC frames by reducing byte one by one from last byte according to a load length output signal and a register length output signal of the frame counter(5), to generate an execution data end signal. A length check counter(8) compares the execution data end signal with a count check signal of the frame counter(5) to output a signal of checking an error of frame length. A CRC part(9) performs CRC for inputted receiving data using the start boundary signal and the count check signal, to output a count error check signal. And a frame error decider(10) decides the count error check signal and the count error check signal of the length check counter(8), to generate a final frame error signal(Frame_error).
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