| 摘要 |
<p>This patent describes a fail-safe operating system for microprocessor based System-on-Chips, giving System-on-Chips considerable tolerance to intermittent failures. The problem this patent aims to solve is the vulnerability of current System-on-Chips when operating outside the normal working conditions. The goal of this patent is to make System-on-Chips much safer and robust than System-on-Chips with normal operating systems. The above mentioned drawbacks are overcome with a System-on-Chip comprising an operating system designed to execute jobs in a sequential manner, each job having a set of input data/conditions and output data/conditions characterized in that, it comprises means to repeat jobs at least twice for each set of input data, and comparison means to validate the results from repeated jobs by checking the output data for equivalency, and means to continue the execution in case of successful comparison, and means to launch of an exception handler in case of unsuccessful comparison. <IMAGE></p> |
