发明名称 |
Semiconductor memory device and information device |
摘要 |
<p>A semiconductor memory device in which an input command controls an operation includes a command state machine for decoding the input command and outputting the decoding result; a plurality of status registers for storing state information of the semiconductor memory device; a first switching circuit for receiving data from the plurality of status registers, and selectively outputting the data from at least one of the plurality of status registers to a first data bus; and a second switching circuit for receiving the data on the first data bus and data from a sense amplifier, and selectively outputting either one of data to a second data bus. At least the first switching circuit, among the first and second switching circuits, is controlled by the decoding result output by the command state machine. <IMAGE></p> |
申请公布号 |
EP1271551(A2) |
申请公布日期 |
2003.01.02 |
申请号 |
EP20020254587 |
申请日期 |
2002.06.28 |
申请人 |
SHARP KABUSHIKI KAISHA |
发明人 |
NAKAZAWA, KEN;SUMITANI, KEN;FUKUI, HARUYASU;MORI, YASUMICHI |
分类号 |
G11C11/41;G06F12/02;G11C7/22;G11C16/02;G11C16/06;(IPC1-7):G11C16/32;G11C7/10 |
主分类号 |
G11C11/41 |
代理机构 |
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代理人 |
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主权项 |
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地址 |
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