Method for fabricating a stacked semiconductor chip package

摘要

A stacked semiconductor chip package includes: a substrate including a plurality of conductive pads; a first semiconductor chip mounted on the substrate; and electrically connected to the conductive pads; a plurality of electrical leads provided about the substrate; a first molding part for sealing the substrate and the first semiconductor chip; a second semiconductor chip mounted on an upper surface of the first molding part and electrically connected to the electrical leads; and a second molding part for sealing the second semiconductor chip, the second conductive wires and a portion of the leads.