发明名称 METHOD FOR FABRICATING METAL INTERCONNECTION
摘要 PURPOSE: A method for fabricating a metal interconnection is provided to easily fill a via hole in a metal layer for interconnection, by preventing a bowing phenomenon on the sidewall of the via hole and by preventing an oxide layer of a low dielectric constant from being sharply dug at the side surface of a lower metal interconnection. CONSTITUTION: A low dielectric constant insulation layer(39) is formed on an insulated substrate(31) having the first metal interconnection. The low dielectric constant insulation layer is planarized. The second and third insulation layer are sequentially formed on the planarized low dielectric constant insulation layer, in which the second insulation layer is formed as an etch barrier on the third insulation layer. The third insulation layer on the first metal interconnection region is selectively etched. The second insulation layer and the low dielectric constant insulation layer are selectively etched to form the via hole(44) by using the third insulation layer as a mask. A diffusion barrier layer and a metal layer are sequentially formed on the entire surface including the via hole to fill the via hole.
申请公布号 KR20020096365(A) 申请公布日期 2002.12.31
申请号 KR20010034771 申请日期 2001.06.19
申请人 HYNIX SEMICONDUCTOR INC. 发明人 KIM, GIL HO
分类号 H01L21/28;(IPC1-7):H01L21/28 主分类号 H01L21/28
代理机构 代理人
主权项
地址