MEMORY CELL ARRAY STRUCTURE FOR NON-VOLATILE SEMICONDUCTOR MEMORY UNIT, THE NON-VOLATILE SEMICONDUCTOR MEMORY UNIT ACCESS METHOD FOR MEMORY CELL ARRAY OF THE UNIT, NAND FLASH MEMORY UNIT, AND SEMICONDUCTOR MEMORY

摘要

PROBLEM TO BE SOLVED: To provide memory cell array structure of a non-volatile semiconductor memory unit, which can read data more quickly in the case of high-speed random access and accessing data of a small number. SOLUTION: In memory cell array structure of a non-volatile semiconductor memory unit provided with a main memory cell array comprising a plurality of NAND cell strings, this structure is provided with a sub-memory cell array, which is coupled operationally with a main bit line of the main memory cell array in program and erasure operation, and is cut off electrically with the main bit line in read-operation, to form read-path different from a read-path of the main memory cell array, and which has a plurality of NAND cell strings, comprising memory cell transistors of a smaller numbers than the number of memory cell transistors of NAND cell strings of the main memory cell array.