发明名称 Semiconductor wafer edge bead removal method and tool
摘要 A method for planarizing a dielectric layer on a semiconductor wafer is provided. In one aspect, the wafer is coated with a resist and the resist selectively removed forming an uncoated peripheral portion of the wafer. The partially coated wafer is then exposed to an etchant such as RIE to etch the dielectric material not covered by the resist and forming a profiled dielectric layer having a thinner peripheral dielectric portion and a remaining thicker original dielectric central portion. The profiled wafer is then planarized using CMP. The dielectric layer is typically SiO2, PSG, BSP, or BPSG. In another method and apparatus of the invention, a dielectric coated wafer is secured to a rotating turntable and a liquid etchant sprayed at the periphery of the wafer from a distribution conduit to etch and remove dielectric from a circumferential edge of the wafer forming a profiled dielectric layer as above which is then planarized by CMP. In another aspect of the invention, a CMP polished semiconductor wafer having an edge bead is planarized by polishing only the edge bead of the dielectric layer using a special polishing tool or a CMP apparatus to remove the edge bead from the dielectric layer. Planarized semiconductor wafers made using the method and apparatus of the invention are also provided.
申请公布号 US6497784(B1) 申请公布日期 2002.12.24
申请号 US19990441862 申请日期 1999.11.17
申请人 INTERNATIONAL BUSINESS MACHINES CORPORATION 发明人 JONES BRADLEY P.;SARDESAI VIRAJ Y.
分类号 H01L21/00;H01L21/3105;(IPC1-7):H01L21/00 主分类号 H01L21/00
代理机构 代理人
主权项
地址