发明名称 INSULATED-GATE FILED-EFFECT TRANSISTOR AND MANUFACTURING METHOD THEREFOR
摘要 PROBLEM TO BE SOLVED: To actualize in a channel region a distribution which has low impurity density on the surface of a semiconductor and steep toward the inner side of the semiconductor substrate with impurites B, P, etc., having high activation rates for prevention punch-through phenomenon of a fine MOS transistor and a large current, even through the B, P, etc., with the high activation rates being too high a diffusion speed to have low impurity density on the semiconductor surface, and a steep distribution toward the inner side of the semiconductor substrate and In and Sb, having a large mass, can actualize steep distribution, but will have low solution or low activation rates and cause crystal defects. SOLUTION: Impurities, having an electrically high activation rate, are introduced into a channel region and an In-injected layer is formed in a polarity shallow region the channel region. The impurities B and P are re distributed so as to obtain the maximum In-injected layer density and depth, and a channel impurity region is formed which electrically operates as impurities of B, P, etc., depending on In for low- concentration and vertically steep impurity distribution. This impurity distribution actualizes both prevention of the punch-through phenomenon of a superfine complementary type MOS transistor and an increase of a current.
申请公布号 JP2002368212(A) 申请公布日期 2002.12.20
申请号 JP20010176478 申请日期 2001.06.12
申请人 HITACHI LTD;HITACHI ULSI SYSTEMS CO LTD 发明人 HORIUCHI KATSUTADA;TAKAHAMA TAKASHI;ONISHI KAZUHIRO;MITSUDA KATSUHIRO
分类号 H01L21/28;H01L21/265;H01L21/8234;H01L21/8238;H01L27/088;H01L27/092;H01L29/10;H01L29/78;(IPC1-7):H01L29/78;H01L21/823 主分类号 H01L21/28
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