发明名称 ANALOG MOS SEMICONDUCTOR DEVICE, MANUFACTURING METHOD THEREFOR, MANUFACTURING PROGRAM AND PROGRAMMING APPARATUS
摘要 PROBLEM TO BE SOLVED: To suppress systematic offset voltage and random offset voltage of an analog MOS semiconductor device which includes a plurality of MOS transistors, if some difference takes place in processing. SOLUTION: A plurality of MOS transistors are constituted, each using a plurality of micro-unit transistors MUPA 1. The transistor MUPA 1 has a channel width, equal to an inverse of the multiple of the shortest channel width that one of the plurality of MOS transistors has, and the transistor MUPA 1 is composed of two small transistors 1a, 1b connected in parallel and comprises a commonly used drain 8 at the center, gates 7, 7 located at both sides thereof, and sources 6, 6 located at the sides thereof, both ends.
申请公布号 JP2002368117(A) 申请公布日期 2002.12.20
申请号 JP20020080583 申请日期 2002.03.22
申请人 MATSUSHITA ELECTRIC IND CO LTD 发明人 NAKATSUKA JUNJI
分类号 H01L21/822;H01L21/82;H01L21/8234;H01L21/8238;H01L27/04;H01L27/08;H01L27/088;H01L27/092;(IPC1-7):H01L21/822;H01L21/823 主分类号 H01L21/822
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