发明名称 Semiconductor memory device for effecting erasing operation in block unit
摘要 A semiconductor memory device comprising first memory blocks, a first decoder, at least one second memory block, a second decoder, a defective block address storing section, and a block address comparing section. The second memory block has substantially the same construction as the first memory blocks. The defective address storing section has a memory element and stores a defective block address. A readout operation of the defective block address storing section is effected at the turn-ON time of a power supply. The block address comparing section compares the defective block address stored in the defective block address storing section with an input block address. The first decoder which selects the first memory block in which a defective cell occurs is set into the non-selected state and the second decoder is set into selected state when coincidence of the compared address is detected in the block address comparing section.
申请公布号 US6496413(B2) 申请公布日期 2002.12.17
申请号 US20010961429 申请日期 2001.09.25
申请人 KABUSHIKI KAISHA TOSHIBA 发明人 TAURA TADAYUKI;ATSUMI SHIGERU
分类号 G06F12/16;G06F12/06;G11C16/06;G11C29/00;G11C29/04;H01L21/8247;H01L27/10;H01L27/115;H01L29/788;H01L29/792;(IPC1-7):G11C16/06 主分类号 G06F12/16
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