发明名称 CACHE POLLUTION AVOIDANCD INSTRUCTIONS
摘要 A computer system and method for providing cache memory management. The computer system comprises a main memory having a plurality of main memory addresses each having a corresponding data entry, and a processor coupled to the main memory. At least one cache memory is coupled to the processor. The at least one cache memory has a cache directory with a plurality of addresses and a cache controller having a plurality of data entries corresponding to the plurality of addresses. The processor receives an instruction having an operand address and determines if the operand address matches one of the plurality of addresses in the cache directory. If so, the processor updates a data entry in the cache controller corresponding to the matched address using a byte mask pattern. Otherwise, a data entry corresponding to the operand address in the main memory is updated.
申请公布号 SG93196(A1) 申请公布日期 2002.12.17
申请号 SG19990001217 申请日期 1999.03.22
申请人 INTEL CORPORATION 发明人 SRINIVAS CHENNUPATY;SHREEKANT S. THAKKAR;THOMAS HUFF;VLADIMIR PENTKOVSKI
分类号 G06F12/08;(IPC1-7):G06F12/08 主分类号 G06F12/08
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