发明名称 Method of arranging exposed areas including a limited number of test element group (TEG) regions on a semiconductor wafer
摘要 A method includes a first step of forming a first exposed area including only a device region on a semiconductor wafer that is repeated as needed. Next, a second step of forming a second exposed area including a portion of the device region and a Test Element Group (TEG) region on the semiconductor wafer is performed at least once. A plurality of first exposed areas and at least one second exposed area can be arranged on the semiconductor wafer at fixed pitches in the horizontal and vertical directions, even when the number of TEG regions is limited.
申请公布号 US6492189(B1) 申请公布日期 2002.12.10
申请号 US20000696196 申请日期 2000.10.26
申请人 KAWASAKI MICROELECTRONICS, INC. 发明人 YAMAGUCHI TAKAHISA
分类号 H01L21/027;G03F1/08;G03F1/44;G03F1/68;G03F7/20;G03F7/22;H01L23/544;(IPC1-7):H01L21/66 主分类号 H01L21/027
代理机构 代理人
主权项
地址