发明名称 Memory control system
摘要 The processor, upon fetching a sleep command, stops its own operation and outputs an internal power-down signal. The power-down control circuit outputs, upon receiving the internal power-down signal from the processor, a control signal to put a volatile semiconductor memory connected to the system bus into a self refresh mode. Thus, the processor can simply fetch the sleep command to put the semiconductor memory into the self refresh mode. Since system programs need not include any processing program for putting the semiconductor memory into the self refresh mode, the software processing can be prevented from being complicated. As a result, it is possible to reduce the burden on the program developers.
申请公布号 US2002184438(A1) 申请公布日期 2002.12.05
申请号 US20020036539 申请日期 2002.01.07
申请人 FUJITSU LIMITED 发明人 USUI MINORU
分类号 G11C11/407;G06F1/32;G06F12/00;G06F13/00;G11C11/403;G11C11/406;(IPC1-7):G06F13/00 主分类号 G11C11/407
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