| 摘要 |
The present invention provides a method for fabricating an integrated circuit, comprising the following steps: preparing a substrate (1) with an electrically insulating layer (2) above it; providing an interconnect (WL) having a lower conductive layer (3) and an upper conductive layer (4) on the insulating layer (2), the lower conductive layer (3) consisting of silicon of a first conduction type (n); embedding the interconnect (WL) in an electrically insulating structure (5, 8); reversing the doping of at least one first section (A1; A2) of the lower conductive layer (3) of the interconnect (WL) to the second conduction type (p); and at least partially uncovering a second section (A3) of the lower conductive layer (3) of the interconnect (WL) of the first conduction type (n); and selectively etching the second section (A3) of the lower conductive layer (3) of the interconnect (WL) of the first conduction type (n), with the first section (A1; A2) acting as an etching stop.
|
